Design Overview for ram32x32_xilinx

PropertyValue
Project Name:f:\yacc\syn\xilinx
Target Device:xc3s200
Report Generated:Sunday 04/10/05 at 08:45
Printable Summary (View as HTML)ram32x32_xilinx_summary.html

Device Utilization Summary

Logic UtilizationUsedAvailableUtilizationNote(s)
Logic Distribution:    
Number of Slices containing only related logic:000% 
Number of Slices containing unrelated logic:000% 
Number of bonded IOBs:11317365% 
Number of Block RAMs:21216% 
Number of GCLKs:1812% 

Performance Summary

PropertyValue
Data Not Yet Available  

Failing Constraints

Constraint(s)RequestedActualLogic Levels
Data Not Yet Available   

Detailed Reports

Report NameStatusLast Date Modified
Synthesis ReportCurrentSunday 04/10/05 at 08:45
Translation ReportCurrentSunday 04/10/05 at 08:45
Map ReportCurrentSunday 04/10/05 at 08:45